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Silicon Labs /EFR32FG23A011F512GM40 /EMU_NS /VREGVDDCMPCTRL

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Interpret as VREGVDDCMPCTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (VREGINCMPEN)VREGINCMPEN 0THRESSEL

Description

No Description

Fields

VREGINCMPEN

VREGVDD comparator enable
THRESSEL

VREGVDD comparator threshold programming

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data